On April 21, from 2 to 4 p.m, the ROC team will organize a seminar where the two Ph.D. students Alessandro Aimi and Mario Patetta will present their research activities, followed by short presentations from two master interns: Maritzabel Del Pozo and Hussein Hamdouna.
Title
Service quality differentiation for long-range low-power networks in the Massive IoT.
Speaker
Alessandro Aimi
Abstract
With the rapid deployment of applications based on connected objects, a resource contention problem arises in the access network. This is especially true in Long Range Wide Area Networks (LoRaWAN), where the Packet Delivery Ratio (PDR) can quickly fall with increased traffic density. This type of network is simple to deploy and operate at the expense of natively loose commitments in terms of quality due to the energy-sparing protocol design. Thus, the possibility to control and differentiate service quality becomes an attractive prospect, as shown by the many recent LoRaWAN radio access network slicing propositions. To address this shortcoming, we design and evaluate several techniques to meet differentiated PDR targets.
In essence, we develop channel allocations to isolate clusters of devices, followed by traffic control actions to operate on the trade-off between PDR and traffic intensity.
Simulation results show that our current proposition attains high levels of accuracy, with close-to-maximum efficiency in congested settings. We show that our method is instrumental in isolating clusters of devices and meeting distinct PDR targets in the same radio space. Moreover, we show that our proposition can adapt to sparse changes in the pool of connected devices to bring back quality compliance. On different note, we also develop ELoRa, a research tool for studying LoRaWAN service management; ELoRa is a LoRaWAN access network emulator to transparently interact with real-life deployments of core network functions.
Bio
Alessandro Aimi graduated in Computer Science and Engineering at Politecnico di Milano (Italy) in July 2020. He joined the ROC team in October 2020 to work on a Ph.D. thesis on virtualized network management and automation algorithms in collaboration with Orange Innovation.
Title
Exploit Programmable Data Plane: NetFPGA-Supported Anomaly Detection.
Speaker
Mario Patetta
Abstract
Software Defined Networking (SDN) is a network infrastructure paradigm in which control and forwarding processes are separated. The control plane is the software responsible for establishing forwarding rules based on the network conditions, while the data plane is composed by all the forwarding devices.
Programmable network devices enable users to implement their own data plane algorithms. They provide flexibility in terms of resources allocation and, being them software driven, changes can be applied swiftly, bypassing the potentially difficult development of novel silicon chips. One of the main advantages of using programmable packet processors is the capability to execute user-defined operations on top of forwarding. Some examples of tasks that can benefit of this are network monitoring, in-network computing, and load balancing.
As opposed to centralized monitoring systems, data plane computing dramatically reduces the overhead due to information needing to be stored and retrieved from switches as well as speeding up the process, since at least part of the computation can be performed online. This approach could greatly benefit Intrusion Detection, as performance constrains prevented traditional solutions from treating every packet at line rate, opting for sampling or for offline processing.
We focus on detecting botnets, proposing a solution inspired to Split-and-Merge, a port-based anomaly detection algorithm able to detect large-scale attacks in their early stages. We adapt the algorithm to be run on top of programmable devices in an SDN environment and implement it on FPGA boards. We show how it can be used to detect malicious activity in real time and how an SDN approach can be used for attack mitigation.
Bio
After graduating in Electronic Engineering at University of Rome Tor Vergata, Mario Patetta is currently a Ph.D. candidate at Conservatoire National des Arts et Métiers in Paris. His research topic regards SmartNIC and NetFPGA implementation of network functions.
Title
Design and evaluation of data-pipelining systems for in-network AI.
Speaker
Maritzabel Del Pozo
Abstract
Challenges in data pipeline systems such as asynchronous FL clients and placement problems of brokers and processing engines, future updates to the data pipeline system and a project roadmap are discussed.
Bio
Telecom and Network Infrastructure Engineer with 10 years of experience. I’ve lived and worked in Venezuela, Ireland, Germany and now France. I’m currently finishing a Master in Cloud and Network Infrastructures at Sorbonne Université and TU Berlin.
Title
Accelerating Fully Homomorphic Encryption with FPGA.
Speaker
Hussein Hamdouna
Abstract
FHE is a powerful cryptographic technique that allows computations on encrypted data without the need for decryption. The goal is to explore the feasibility of accelerating homomorphic encryption on FPGA hardware.
I will be introducing the topic of my project, what is about, some previous work, and tasks to be done during my internship.
Bio
I did my Bachelor degree in Beirut in Computer and communications engineering, then I started working as an IT intern for 6 months at Source du Pays (Cameroon) I was responsible for network maintenance and troubleshooting. I came to France in 2021 to do my Master degree in Computer Networking & IoT and this is my final M2 semester.
